1. Technical Field
This disclosure relates to integrated circuits employing multiple functional blocks at different clock frequencies, and in particular, to methods for synchronizing data transfers between such functional blocks.
2. Description of the Related Art
Computing systems may include one or more systems-on-a-chip (SoC), which may integrate a number of different functions, such as, e.g., graphics processing, onto a single integrated circuit. With numerous functions included in a single integrated circuit, chip count may be kept low in mobile computing systems, such as tablets, for example, which may result in reduced assembly costs, and a smaller form factor for such mobile computing systems.
Within an SoC, different regions or functional blocks may operate at different clock frequencies (functional blocks operating at different clock frequencies are commonly referred to as being in different “clock domains”). For example, functional blocks coupled to external interfaces may operate at a clock frequency commensurate with the needs of such external interfaces, while other functional blocks may be designed to function at a highest clock frequency possible for a given semiconductor manufacturing process. Other functional blocks may include logic circuits operating at different clock frequencies, while some functional blocks may also allow for varying clock frequencies over time dependent upon work load.
In some cases, it may be necessary to transfer data from a functional block operating at one clock frequency to a functional block operating at a different clock frequency. When transferring data from one clock domain to another, errors may arise as the data is captured at the receiving functional block. To mitigate such errors, synchronization units may be employed to ensure that data at the receiving end is properly sampled and captured.